1. Field of the Invention
The present invention relates to a device for applying a test voltage from the external of a memory device in a burn-in test mode.
2. Description of the Related Art
It is well known in general that the burn-in test is carried out to test a semiconductor device in the extreme environment of high temperature and high pressure, which verifies the reliability of the semiconductor device.
FIG. 1 illustrates a conventional burn-in test scheme.
In FIG. 1, a test mode unit 100 is a circuit to output a burn-in test signal tm_bi in a test mode. A high voltage generator 101 is a circuit to generate a high voltage VPP applied to wordlines of a memory device. A wordline driver 102 applies the high voltage VPP to a wordline. A reference voltage generator 103 for core voltage generates a reference voltage VREFC. A core voltage generator 104 outputs a core voltage. Here, the core voltage means a voltage used in a bank region of a memory device. And, a block 11 depicts a high voltage transfer route, while a block 12 depicts a core voltage transfer route. In reference, the core voltage is a high-level voltage stored in a memory cell and the reference voltage VREFC is a half level (½) of the core voltage. The core voltage Vcore provided from the core voltage generator 104 is used as a driving voltage of a bitline sense amplifier 105. The core voltage Vcore is transferred to bitlines Bit and /Bit by the bitline sense amplifier 105.
In a conventional case as shown in FIG. 1, a burn-in test is carried out with the high voltage and the core voltage which are made within a memory device. In other word, after the burn-in test signal tm_bi as a control signal generated from the test mode unit 100 enables the high voltage generator 101 and the reference voltage generator 103, the high voltage and the core voltage (i.e., a burn-in test voltage) are applied to the wordline and bitline.
With such a scheme using the internal burn-in test voltages for a burn-in test mode, there are several disadvantages as follows:
1) It is difficult to generate accurate voltage levels of the burn-in test voltages (voltage levels of the high voltage and the core voltage);
2) It would occur shortness of the burn-in test voltage levels under required voltage levels because of process variations, which degrades the screen ability thereof; and
3) It would result in an overkill effect when the internal burn-in test voltages are very higher than the required voltage levels.